Distributors Interfacing to SRAM on an XS Board
Q:
I tried to store and retrieve data from the RAM Banks in my XS board. I followeed all the timing specifications mentioned by the SRAM manufacturer. But I am not successful.
A:
What type of failures did you see? Can you store and retrieve from a single RAM address? How fast are you accessing the RAM?
Q:
If anyone is successful in this, could you share your code with me?
A:
Interfacing to the SRAMs should be easy. Here are the basic procedures:
Reading from a bank of RAM:
- Lower the chip-select. (You can keep the /CS low all the time if there is no contention with other chips.)
- Output an address to the RAM.
- Lower the RAM output-enable.
- Input the data output from the RAM into the FPGA.
- Change the address and new data from that location will appear on the RAM outputs.
- When done reading the RAM, raise the output-enable and the chip-select.
Writing to a bank of RAM:
- Lower the chip-select.
- Output an address and data to the RAM.
- Lower the RAM write-enable.
- Raise the RAM write-enable. The data is now stored at that address in the RAM.
- Repeat steps 2-4 to write more data into the RAM.