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Question & Answer
Classification: FAQ_CLASSIFICATION
Date: FAQ_DATE
Programming the XS Board with Verilog
Q:
I am currently developing a design in Verilog. What is the design flow and tool flow to use an XS40 board starting from a Verilog design?
A:
Just create your design in Verilog and synthesize the netlist. Then create a UCF file containing the assignments of your I/O to the pins of the FPGA on the XS40 Board. Then use the Xilinx implementation tools to place-and-route the netlist and generate the bitstream. Finally, use the XSLOAD program to download the bitstream to the XS40 Board.