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Question & Answer
Classification: FAQ_CLASSIFICATION
Date: FAQ_DATE
How do you read data from the XS Board RAM?
Q:
We need to be able to read data from the onboard SRAM into the PC over the parallel interface. We wondered if you already had a internal solution that you would share with us.
A:
- 1) Create an FPGA design with a state machine. The states of the machine are:
- s0: accept address bits A0-A3 from bits D4-D7 of the 8-bit parallel port.
- s1: accept address bits A4-A7 from bits D4-D7 of the 8-bit parallel port.
- s2: accept address bits A8-A11 from bits D4-D7 of the 8-bit parallel port.
- s3: accept address bits A12-A14 from bits D4-D6 of the 8-bit parallel port. Address the RAM with the bits A0-A14.
- s4: place bits D0-D3 from the RAM onto bits S4-S7 of the status port.
- s5: place bits D4-D7 from the RAM onto bits S4-S7 of the status port. Return to state s0.
- 2) Create a PC program that sends addresses through the parallel port to the FPGA and then reads the data output through the status port. This is all done in 4-bit quantities to make the state machine happy. (see above)
- 3) Use the D0 or D1 bit of the parallel port as a clock for the state machine. Then the PC program can step the state machine through the process of reading a byte of data from an address. Also use another bit for a reset so you can start the state machine in a known state. You can get fancy and make the state machine auto-increment the address and things like that.