Amping the XuLA Clock Up To 300 MHz

Posted by: Dave Vandenbout 6 years, 4 months ago

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Some people have commented that the 12 MHz clock on the XuLA FPGA board is too slow for practical use. What they've missed is the Spartan-3A FPGA has on-chip digital frequency synthesizers (DFS) that can multiply the clock to over 300 Mhz. To show how easy it is to do this, I've added another chapter on using the DFS to my new book about doing FPGA design using Xilinx ISE WebPACK and the XuLA board. It just takes a few lines of VHDL and you can have almost any clock frequency you want between 5 MHz and 320 MHz.*

* Actually, you can have any clock frequency that can be expressed as F = (12 MHz) x M / D where M and D are integers in the range [1..32] and where the final result is in the range [5..320] MHz. But that's still a lot of frequencies. And you can cascade multiple DFS modules if you need even more precision in your final frequency.

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